Design Support Services

Apart from the main design services, we have strong offerings in the areas of IP Re-engineering and Design, Point services like DFT, PD, FPGA services, DFT tools Development and maintenance services, etc.

Our Offerings

IP Re-engineering and Design Services

IP reuse has become norm in the design to meet the ever demanding higher productivity challenges and requirements. However, to develop and maintain Quality IPs with reuse in focus requires lot of efforts and time. To meet this industry requirement, MindTree offers IP RED service that covers all aspects of Design & Verification IP design, development and maintenance to keep the IPs ready to reuse across multiple designs & groups with ease. This service would be a great value add to the customers having a set of already existing IPs but they cannot be used as is and require to be modified to meet one or more of the following requirements to reuse across different designs:

• Abstraction level translation, Architecture or Bus protocol changes
• Performance improvement (Power, Timing, Area), Technology migration
• IP bench marking & Certification
• Feature enhancements
• IP process / guidelines compliance
• IP maintenance at multiple site with multiple environment
• Lack of IP Quality, Not much support from IP vendors
• No proper Documentation, Process, Methodology, Database
• More Silicon bugs, Productivity loss, Problem in spin-off
• Design team not available, HW changes to comply with SW changes

Our Offerings

• Design IP Development
• Design IP Enhancements & Features Additions
• IP Clean Up, Process & Quality Checks
• Synthesis, STA, DFT and Physical Design
• Process Automation & Regressions
• IP Integration, Verification & Validation
• Verification IP Development
• Verification Environment & Component Enhancements
• Test Bench Migration across HDL, HVL
• Coverage Analysis & Improvements
• ASIC FE / BE Flow Flush
• FPGA Flow Flush
• IP Packaging & Documentation

Why MindTree

Using our Proprietary methodology IP-ReD, customers can get the following advantages:

• Efficient and cost effective solutions
• Easy to Reuse and easy to Spin-off
• Customization, Clean up and Maintenance
• Productivity improvement and Time to Market
• IP Design and Good Qualification
• A robust methodology for IP design & Process
• Covers all aspects of IP development thoroughly

FPGA Services

SoC/IP developers can prototype designs quickly before tape out, enabling more efficient, smarter accomplishment of tasks using Field Programmable Gate Arrays (FPGA). System designers today can differentiate their offerings, thanks to the several possibilities afforded by FPGA. Thus, FPGA plays a very vital role in the ASIC or end product realization cycle.

Our Offerings

• Turn-key Design services
  • FPGA targeted design development
  • FPGA migration (Vendors/Devices/ASIC to FPGA)
  • ASIC prototyping
• Modeling based services using Industry standard modeling tools
  • Algorithm to FPGA
  • Hardware Modeling

   

  Accomplishments

  We have exposure to various technologies and have successfully demonstrated our capabilities in various applications. MindTree's Silicon IPs like Bluetooth and UWB has been prototyped on FPGA, demonstrating our experience and capabilities in prototyping complex designs.

   

  Why MindTree

  • Our close working relationship with multiple FPGA device vendors provides a comprehensive understanding of the architecture and optimization techniques of each major FPGA/CPLD, such as Altera, Xilinx, Lattice and Cypress. MindTree has access to IPs provided by FPGA vendors as well.
  • MindTree provides ASIC/ASSP/SoC validation using FPGAs. Our system design expertise can also provide a value-add in terms of end-to-end product realization and we pick & use the most optimum FPGA/CPLD solution to meet customer's requirements at optimum cost.

  DFT Tools Development

  MindTree offers EDA tools in the area of Design for Testability. Today's industry standard tools do not address all the needs of the DFT engineer and hence the EDA team of MindTree was formed to bridge the "Automation Gap" in the Design flow and EDA vendor tools. Our tools can be customized for customer specific flow and requirements.

   

  Our Offerings:

  • 1500 CWGEN - 1500 Core Wrapper GENeration (Download Data sheet)
  • CUSION - Custom Instruction verification through JTAG (Download Data sheet)
  • BSDGEN – Boundary Scan Design GENeration (Download Data sheet)
  • COMBATADS - COMpliance for Boundary scan And Test for Analog and Digital Standards (Download Data sheet)
  • IJTAG Verifier (Download Data sheet)

   

  Accomplishments

  MindTree DFT tools are used as sign-off tool by various top semiconductor companies. Our tools generate test vectors that are directly portable on tester and are proven over 100+ designs. The team has developed tools for customer specific needs.

   

  Sample Case Studies

  • Redesign of I2C block with enhanced features for a US based memory vendor
  • IP Library development for a leading US based semiconductor company